HAETAE

HAETAE targets to establish a novel computing paradigm by developing a multi-material PIC technology platform and align this along photonic Neural Network architectures capable of operating along the principles of Transfer Learning methods. HAETAE will deploy a co-integrated PIC platform that brings together the best-in-class material platforms through micro-transfer-printing and hybrid multi-chiplet bonding and proceeds along the best-in-class linear optical circuit architectures, combining: a) Si/Si3N4/SiGe photonics for high-speed fan-in, weighting and fan-out computational stages, b) InP actives for on-chip amplification, and all-optical non-linearities, for speed- and SNR-enhancement in neuromorphic photonic circuit layouts, c) Si/Si3N4 non-volatile Micro-Electro-Mechanical Systems (MEMS) structures for energy-efficient and non-volatile weighting, d) embedded FPGA-based control plane for the efficient programmability of MEMS and chip-configuration. It aims to finally deliver a Photonic Transfer Learning engine that can support one order of magnitude improvements along all critical performance metrics of AI chipsets: energy efficiency of <19fJ/MAC and on-chip computational power that can scale to ~4.1PMAC/s. HAETAE aims to highlight the versatility and flexibility of its twofold photonic transfer learning accelerator by targeting three discrete application sectors in communications and computing: i) real-time threat detection processor for DC cybersecurity applications, ii) DL and AI computing as a LLM transformer, and iii) an optics-enabled AI-enhanced DSP processor for IM/DD transceivers.